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  ? 2000 california micro devices corp. all rights reserved. 7/18/2000 1 pacr4g california micro devices 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com high performance bus termination network features ? designed especially for high performance computers/servers  provides high speed bus termination  reduces ground bounce with ground pin placement / ultra low crosstalk  terminates 20 lines in a qsop package product description high speed microprocessors demand unique, high speed bus termination. the pacr4g termination network provides 20 terminations per package and meets the requirements for high speed terminations. this termination network provides high performance, high reliability, and low cost through manufacturing efficiency. the termination resistor elements are fabricated using state-of-the-art thin film manufacturing. applications  high performance servers  high performance desk top systems  gtl, ntl, ecl terminator c0970500 schematic configuration this integrated solution is silicon-based and has the same reliability characteristics as any of today?s micro- processor products. the thin film resistors have very high stability over temperature, over applied voltage and over life. in addition the qsop industry standard packaging is easy to handle in manufacturing and yields a high reliability similar to other semiconductor compo- nents. 24 r rrr r rrr r r r r r r r rr r rr 1 23 2 22 3 21 4 20 5 19 6 18 7 17 8 16 9 15 10 14 11 13 12 n o i t a m r o f n i g n i r e d r o t r a p d r a d n a t s e g a k c a pr e b m u n t r a p g n i r e d r o e d o c rs n i pe l y t ss e b u tl e e r & e p a tg n i k r a m t r a p 0 7 44 2p o s qt / q g 4 r 0 7 4 c a pr / q g 4 r 0 7 4 c a pq g 4 r 0 7 4 c a p 0 0 54 2p o s qt / q g 4 r 0 0 5 c a pr / q g 4 r 0 0 5 c a pq g 4 r 0 0 5 c a p 0 6 54 2p o s qt / q g 4 r 0 6 5 c a pr / q g 4 r 0 6 5 c a pq g 4 r 0 6 5 c a p 0 8 64 2p o s qt / q g 4 r 0 8 6 c a pr / q g 4 r 0 8 6 c a pq g 4 r 0 8 6 c a p 0 0 94 2p o s qt / q g 4 r 0 8 6 c a pr / q g 4 r 0 8 6 c a pq g 4 r 0 8 6 c a p s n o i t a c i f i c e p s d r a d n a t s ) r ( e c n a r e l o t e t u l o s b a% 1 e g n a r e r u t a r e p m e t g n i t a r e p oc 0 7 o t c 0 r o t s i s e r / g n i t a r r e w o pw m 0 0 1 e r u t a r e p m e t e g a r o t sc 0 5 1 o t c 5 6 ? g n i t a r r e w o p e g a k c a px a m , w 0 0 . 1 k l a t s s o r cl a c i p y t % 2 < s e u l a v d r a d n a t s ) w ( re d o c 7 40 7 4 0 50 0 5 6 50 6 5 8 60 8 6 0 90 0 9
?2000 california micro devices corp. all rights reserved. 7/18/2000 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com 2 pacr4g california micro devices signal at termination and victim line (ta = 25 o c) (see test circuit) channel 1 (500mv/division) termination signal, channel 2 (50mv/division) victim voltage. the victim voltage crosstalk measures 35mv in the critical areas around the system clock. the system clock occurs approximately 4ns before each data transition. the horizontal dashed lines are 35mv apart. the time scale is 5.0ns/division. (the signal voltage rise and fall times have been adjusted at the driver to conform to intel specifications.) measurements made using tektronix tds820 6 ghz digitizing oscilloscope with p6207 fet probes. test circuit block diagram c h a 500 mv / d e c h a 2 50 mv / d e 1 5 m v 15mv
? 2000 california micro devices corp. all rights reserved. 7/18/2000 3 pacr4g california micro devices 215 topaz street, milpitas, california 95035 tel: (408) 263-3214 fax: (408) 263-7846 www.calmicro.com test circuit vcc_1.5 r 1 r 2 g 3 r 4 r 5 r 6 g 7 r 8 r 9 g 10 r 11 r 12 r 13 r 14 g 15 r 16 r 17 r 18 g 19 r 20 r 21 g 22 r 23 r 24 u3 prn331b c22 1000pf c23 0.1uf tp5 pb5 victim vtt vtt gtl2 gtl3 vtt gtl4 gtl4 vtt vtt gtl8 gtl8 gtl9 gtl9 gtl11 gtl11 vtt gtl7 gtl1 gnd r2 56 c18 1000pf c19 0.1uf c20 1000pf c21 0.1uf vcc_1.5 gnd r1 56 c15 1000pf c16 0.1uf c17 0.1uf gtl1 gtl2 gtl3 gtl4 gtl5 gtl6 gtl8 gtl7 vcc_5 vcc_1.5 gnd gnd gnd /oeab 1 leab 2 a1 3 a2 5 a3 6 vcc_3 7 a4 8 a5 9 a6 10 a7 12 a8 13 a9 14 a10 15 a11 16 a12 17 a13 19 a14 20 a15 21 vcc_3 22 a16 23 a17 24 clkin 26 /oeba 27 leba 28 /ceba 29 clkba 30 clkout 31 b17 33 b16 34 vref 35 b15 36 b14 37 b13 38 b12 40 b11 41 b10 42 b9 43 b8 44 b7 45 b6 47 b5 48 b4 49 b3 51 b2 52 b1 54 clkab 55 /ceab 56 u1 74gtl16616 c8 0.1uf c9 0.1uf vcc_3 gnd gnd gnd gate1 gate2 gate3 gnd gnd gnd 1a1 2 1a2 4 1a3 6 1a4 8 2a1 11 2a2 13 2a3 15 2a4 17 1g 1 2g 19 1y1 18 1y2 16 1y3 14 1y4 12 2y1 9 2y2 7 2y3 5 2y4 3 u2 74fct244 gate1 gate2 gate3 gate4 buffer1 vcc_5 w1 sma rin1 100 rin2 100 tp1 pb1 tp1 buffer1 gnd gnd gnd pulse_gen gnd gnd tp4 pb4 tp4 gnd c10 0.1uf c11 0.1uf vcc_3 gnd gnd gate4 gnd vcc_5 gnd gnd vcc_3 c12 0.1uf c13 1000pf c14 0.1uf vref gtl9 gtl11 gtl10 gtl_test victim gnd vcc_5 gnd gnd r3 1k r4 2k c24 1000pf c25 0.1uf vref vcc_1.5 gnd tp3 pb3 tp3 gtl2 gtl6 gtl6 gtl7 gnd gnd gnd gnd 1 2 3 4 5 6 7 8 jp1 power vcc_5 vcc_3 vcc_1.5 gnd gnd gnd gnd gnd gnd vcc_1.5 vcc_5 vcc_3 gtl3


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